True Corners

In today’s transistor-level design flow, global process corners (a.k.a. digital corners TT, SS, FF, SF, FS) are commonly used to estimate the effects of process variation on a design. These corners, provided by the manufacturer, are simulated in SPICE to check for manufacturing risks.

True Corners provide Monte Carlo accuracy in Digital Corner time

Limitations of digital corners

The use of digital corners causes design loss – wasted power, wasted area, design failures, failed specifications, reduced performance, and lost time.

Digital corners are universally familiar; however, they have four important limitations:

• Digital corners do not include local variation effects (mismatch)
  • In reality, devices vary independently within a design
  • The amount of mismatch is a function of device size
• Digital corners are derived for digital designs
  • Digital corners are often described as “fast” or “slow”
  • “Fast” and “slow” are meaningless for analog design; e.g. “fast” gain? “slow” phase margin?
• Digital corners do not necessarily correspond to worst case design performance
  • Digital corners ignore the statistical nature of process variation
  • Sometimes they’re pessimistic, resulting in over-design (wasted power, area)
  • Sometimes they’re optimistic, resulting in under-design (failures, poor performance/yield)
• Digital corners provide very little insight into the causes of process variation problems

A common technique to overcome some of the limitations of digital corners is Monte Carlo analysis. Though much more accurate, Monte Carlo analysis takes a long time to run, and provides no information about the cause of variation problems or how to solve them. These drawbacks make Monte Carlo analysis useful primarily for verification, if at all.

True Corners is a technology that overcomes the limitations of digital corners, but with the same familiar workflow and similar run times. True Corners account for global, local (mismatch) and environmental variations for a specific design, and accurately represent the manufacturing and operating variance that a design is subjected to. They make it possible to improve performance/yield, reduce power/area/design time, and avoid design failures in today’s nanometer designs.

Overall benefits

• Monte Carlo accuracy in digital corner time
• Provides the foundation for a familiar, accurate, systematic and efficient corner-based design flow
• Key enabler for eliminating design loss caused by statistical variation
• Similar number of simulations required as a digital corner flow