Glen Wiedemeier, IBM

June 6, 2016, Full Video Transcript

Thank you everyone. So I’m just going to talk about the variation-aware design flow today and my own personal experiences with it.

Top Variation Aware Challenges in FinFET Technologies

Some of the major challenges I saw in variation-aware design were:

  • Hitting power and performance targets, with performance being the overriding concern in my particular application. You need to minimize the power in order to be able to put your stuff on the chip.
  • Removing the pessimism from the traditional design corners was also a major push for moving into a variation-aware design flow. Primarily, minimizing power was the big motivation for that, since we’re under power constraints all the time.

One of others things that the variation-aware design flow allowed was means of trading off the different circuit specs a little easier than you can do with other design flows — the traditional ones of corners and Monte Carlo. Some specs you can’t really get with traditional corners such as your INL or DNL of devices of DAC’s for instance. So you’re required to use Monte Carlo in order to get that. But Monte Carlo is quite prohibitive in terms of time and simulator licenses.

Best Practices for Variation-Aware Design

Some of the best practices for the variation-aware design flow that I’ve observed are when you are working in traditional corner-based flow, you tend to not necessarily design for variations like mismatch. So for certain things, such as when you’re designing a latch that can have its offset taken out, you need to design your simulation deck in order to remove that offset before you start characterizing the design.

That’s one major change from a traditional corner-based methodology that you’d have to do; where you do corners first and then go back and do Monte Carlo to get the specs you couldn’t get with corners.

The other best practice that I’ve come up with in the variation-aware design flow, is using a fast Monte Carlo in Solido that does your Monte Carlo simulation, but also gives you a set of points or a set of corners you can pull out that includes things like mismatch in devices so you can get your duty cycle distortions or things that rely on local mismatch in order to be able to accurately represent the spec.

You can use Solido’s 3-sigma corner extraction or n-sigma corner extraction flow, or a quicker turn around that I started using in the flow was to run the Monte Carlo and then just pick the points that gave me the worst case, that were around the 3-sigma point.

So instead of taking a day or two to get your corner, you could get it in six hours which gives you a lot quicker turnaround if you need to iterate on getting a new corner every time you make an update to a circuit. Because some circuit characteristics can change quite a bit as you’re tuning the circuit.

That leads into the third point of using Solido DesignSense to help with optimizing the circuit. So you can modify your device sizes across a range of device sizes and you can do it across however many devices in the circuit you had simulation time for.

That lets you see the sensitivities in the circuit and gradually adjust the specs that you wanted to really focus in on and provide tradeoffs as you’re going through the optimization of the circuits.

Must-Have Features of a Variation-Aware Design Flow

Some of the must-have features of variation-aware design flow: you’ve definitely got to be able to generate simulation corners that are appropriate for each individual circuit, including the local variation as well as the global variation, to be able to optimize the circuit fully and perform the correct tradeoffs on a circuit. Certain specs may not be terribly important as long as they’re under a certain threshold, but other specs may be very important no matter what.

The reason for needing circuit specific corners is standard corners can be very pessimistic in some cases and they cannot cover a spec at all in other cases.

In those cases you would have to run Monte Carlo, which can be very expensive to run if you’re having to iterate through a design. Then you need to be able to use those corners in what-if scenarios, like I described with Solido DesignSense in the previous slide.

Another must-have from variation-aware design flow is being able to identify what devices are your critical devices in a circuit. And not necessarily just what devices, but what process parameters are a concern in a circuit.

Sometimes you can run into surprises, where for instance, your contact resistance may be your dominant factor in a circuit, especially in these lower technology, lower feature sizes. So you may be thinking by making the device bigger, you’re making it better, but in reality you’re not doing anything for the performance of the circuit — and you’re only using power.

Ease of use is also a very important requirement of a variation design flow.

  • You need to be able to easily analyze what-if circuit changes.
  • You need to be able to visualize the results of those circuit changes so you can make educated decisions on where you want to push the circuit to, to get the best power performance tradeoffs.
  • And of course you need to be able to visualize those tradeoffs. It’s very hard just looking at a set of numbers to figure out what you should do with the circuit.

Results from Using a Variation-Aware Design Flow

Some of the results that I was able to obtain with this flow. For one of the high-speed comparators that I’d worked on, I was able to:

  • Improve the valuation time by about 30% in a 3-sigma corner
  • Reduce the power at the same time by 30%
  • Improve the latch sensitivity by 50% from a previously-tuned design.

In the process of doing this optimization — it was done on post-layout netlist which makes things a lot more challenging than a schematic-based netlist, but is necessary for accuracy. Since each simulation took about two or three hours per case, running Monte Carlo across a lot of different design conditions isn’t really practical.

  • Being able to take those Monte Carlo corners that you get out of Solido, I could run 1000 different combinations of those devices across 10 different corners and do that in the span of about a week or two.
  • If I had tried doing that same thing with a 200 point Monte Carlo simulation, which is what I used to generate the corners from, it would have taken about three months to do those same simulations.

One advantage that quick turn-around time for optimization affords is you can then go through and modify your layouts, get a new post-layout netlist, resimulate it and get more accurate results. So you can hone in on a finely-tuned answer much quicker and much more effectively.

And in this particular case, the number of corners actually needed to characterize the design was less than our typical set of corners. So that actually helps quite a bit too.