Jaeha Kim, Seoul National University

June 2, 2014 edited transcript

Jaeha Kim from Seoul National University. I’m an academic who has a background both in circuit design and design automation, so the views I’m going to present today come from both worlds.


What are the top challenges I see today, particularly as a circuit designer?

The first challenge is to estimate how much variation impacts your circuit. Irina (Ilatov) talked about how much offset they had in sense amps. In my case, it’s more about receiver for high-speed links.

For estimating the variation, Solido Variation Designer does a very good job. I will talk about that in later slides, and I consider this is almost a solved problem.

But if Solido returns with a very large variation of the circuit, what does a circuit designer do? You throw in calibration loops, but it’s not as easy as it sounds, because you must determine how much range you are going to cover and how much resolution you will use in your calibrated circuits. You can’t just try to cover the entire range with a very fine resolution, because it has a lot of bits as complex as the calibration loops, and also aggravates the convergence issues.

And if you have a calibration on top of that, it becomes very difficult to figure out what the worst case is. It’s not the corner case anymore – it’s somewhere in the middle. It could be this variation combined with that calibration conversation; it could be that, plus or minus something else.

I think that for the last one, there are not many good solutions out there. So if you are facing that issue you’re doomed. So as a circuit designer, what we really hope is that we can stop at the first problem. And we hope that Solido Variation Designer will return with a small enough variation, and that we will be happy with that.


So what we do to get that kind of result from Solido Variation Designer is to use circuits that are not sensitive to variation. It sounds simple and there is some known practices for circuit designers.

For instance, these days when you talk about a phase locked loop, about 80 percent of these phase locked loops built today are no longer using analog loop filters. They’re using digital loop filters. There are many reasons for that and one of them is due to variability.


The second one – and this is a very old practice the dates back to the 50’s and 60’s – is that you build circuits that rely only on ratios, rather than on the absolute values. By nature, that is very resilient to any variation.

Of course you have to worry about mismatch between the two transistors, but that’s much less variation than the variation in absolute values like GM and RL and stuff like that.

So this part of the example is my LC oscillator that my student has designed. It sets the frequency based on the ratio between two currents. It’s actually the ratio between the sum of the two currents, and the difference between the two currents. Those two currents are matched, and if you adjust those two currents, you can get an exponential behavior.


Here are some results from real samples. The plot on the left shows that for a different samples you get a different characteristic between input code and frequency. So they’re all different, but because we have designed the circuit based on ratio, if you look at the relative change in frequency, they are more or less constant for all samples. They are around a .005% change for one unit change of the code.


As a result, for a phase lock loop, you get a very constant transfer function across all samples. This is what you want as a designer.


The top must-haves to address variability as a circuit designer?

First, you need to have a good circuit simulator, like Fast SPICE. If you are building a very complicated system, you need a fast system simulator like a behavioral simulator.

But that’s not enough today. SPICE got really fast, but you have to run 1000’s of Monte Carlo simulations – that’s 10,000X of anything.

Solido Variation Designer works as a really smart and efficient Monte Carlo sampler. It uses a very smart sampling and estimating algorithm to pick just the right samples that matter, which reveal the bad things about the circuit. So they can get effects of about 1000 samples using only 100 samples

We have tried Solido on a phased interpolator circuit in our clock and data recovery circuits. With that we were able to estimate things like INL and DNL, the non-linear measure of this phase interpolator circuit with 10X speed up in simulation.


Some problems cannot really be addressed by simulation. Sometimes you need some help from a verification tool. So one practical problem that haunted me for about 7 years is this problem, the same oscillator, which may or may not work at a correct oscillation frequency, depending on how you start it. I’m talking about the same circuit that may work or may not work depending on the initial condition.

Why is this problem so hard? Because if there is space of initial condition, if you have to verify that the circuit worked for all possible initial conditions, you have to cover the entire space, which is continuous. And if you throw in variation on top of that, it makes the problem even worse because now you have all possible variation combinations.


This sounds like an impossible problem, but it turns out that variation actually helps this case – it makes the problem easier. I don’t have much time to explain this, but the concept is that if you have variation, it introduces correlation, so if you verify that one single initial condition is fine across all the variation combinations, then it’s actually fine for the vicinity of that particular point.

So it covers a space, it covers a volume. You have a certain amount of space, and you can only use a finite number of samples to cover the whole space. And with that we discretize the space and use some interesting search algorithm to pinpoint where the problematic initial condition is that causes false oscillation.