Register for a Solido ML Characterization Suite or Variation Designer Demo at DAC 2017

June 19th to 21th

Austin, TX

Austin Convention Centre

Booth #1113

Register here:

Solido ML Characterization Suite uses machine learning to significantly reduce time and resources required for library characterization, while delivering production-accurate Liberty models. Predictor and Statistical Characterizer use real-time validation to ensure model accuracy and work across all Liberty data types, including power, noise, waveform, and statistical data. Solido Variation Designer is used by 1000+ designers across 35+ major semiconductor companies to solve key production design challenges in memory, analog/RF, and standard cell design. 

Solido will be demonstrating ML Characterization Suite as well as Solido Variation Designer 4. The following demonstrations are available:

Solido ML Characterization Suite Predictor

Reduces library characterization time by 30 to 70%

Predictor uses machine learning technology to accelerate standard cell, memory, and I/O library characterization.
  • Accurately generates Liberty models at new conditions from existing libraries at different PVT conditions, Vt families, supplies, channel lengths, model revisions, and more
  • Significantly reduces up-front characterization time and turnaround
  • Works with NLDM, CCCS, CCSN, waveforms, ECSM, AOCV, LVF, and more

Solido ML Characterization Suite Statistical Characterizer

Generates Monte Carlo accurate statistical timing models, >1000x faster than Monte Carlo

Statistical Characterizer uses machine learning technology to accelerate statistical characterization of standard cells, memory, and I/O.
  • Delivers True 3-sigma LVF/AOCV/POCV values with Monte Carlo and SPICE accuracy
  • Handles non-Gaussian distributions
  • Adaptively selects simulations to meet accuracy requirements while minimizing runtime for all cells, corners, arcs, and slew-load combinations

Solido Variation Designer for Memory

Full Chip Memory and Cell Level Statistical Verification

Solido Variation Designer delivers the most advanced and industry-proven technologies for statistical design & verification of memories:

  • Hierarchical Monte Carlo: Verify full-chip memories with perfect statistical accuracy
    • Statistically correct verification of replicated structures
    • Correct application of both global and local variation
  • High-Sigma Monte Carlo: Verify columns, bitcells, sense amps, and other memory blocks to high-sigma quickly and with perfect Monte Carlo and SPICE accuracy
    • Accurately verify production-sized designs (such as memory columns and critical paths)
    • Solve pass/fail, binary, and multi-modal output measurements
    • Efficiently debug high-sigma variation problems
    • Generate trustworthy high-sigma verification results

Solido Variation Designer for Standard Cell

Variation-Aware Verification of Cell Libraries

Standard cell designers use Solido Variation Designer to accelerate the verification of their standard cell libraries across variation. The key technologies are:
  • High-Sigma Monte Carlo: Monte Carlo & SPICE accurate high-sigma verification of standard cells
    • Fast and accurate verification to high-sigma
    • Accurately capture performance and power vs. sigma tradeoffs for the entire sigma range
    • Batch operation for creating customized library verification flows
  • Fast Monte Carlo: Fast, accurate statistical verification of standard cells
    • 3-sigma verification & corner extraction
    • Batch operation for creating customized library verification flows

Solido Variation Designer for Analog/RF and Custom Digital

Statistical & PVT Verification and Debug

Solido Variation Designer gives analog designers the ability to design with greater speed, accuracy, coverage, and insight than ever before:
  • Statistical PVT: Unprecedented accuracy and coverage across 3-sigma statistical variation and operating conditions
  • Fast PVT: 2-50X faster verification across corners & operating conditions
  • Fast Monte Carlo: Fast, accurate 3-sigma verification & corner extraction
  • High-Sigma Monte Carlo: Monte Carlo & SPICE accurate high-sigma verification and design of analog/RF and custom digital circuits.
  • DesignSense: Variation-aware sensitivity & design debugging.