Solido High-Sigma Monte Carlo for High Yield and Performance Memory Design White Paper

Today’s mobile devices demand large memories with stringent power and speed constraints. Cutting-edge process nodes are needed to meet target bit densities; but these nodes have extreme statistical process variation, hurting yield on these high-volume chips. To design for yield, one must be able to measure it in the design phase. This in turn requires estimation of bitcell and sense amp yields, for which a simple Monte Carlo approach would need billions of simulations.

High-Sigma Monte Carlo (HSMC) is a commercially-available technology that enables fast, accurate, scalable, and verifiable estimation of such yields. HSMC can be used both to improve feedback within the iterative design loop, as well as for comprehensive verification of high-sigma designs. This paper contrasts the HSMC method with other methods and presents example results for representative high-sigma designs, revealing some of the key traits that make the HSMC technology effective.

Overview:

  1. Introduction
  2. Building Intuition of the Problem
  3. Review of High-Sigma Approaches
  4. HSMC Method
  5. HSMC: Illustrative Results
  6. HSMC vs. Extrapolated Monte Carlo
  7. HSMC: Discussion
  8. Conclusion

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